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this is information on a product in full production. april 2014 docid023976 rev 2 1/13 STP105N3LL n-channel 30 v, 2.7 m typ., 150 a, stripfet? vi deepgate? power mosfet in a to-220 package datasheet ? production data figure 1. internal schematic diagram features ? r ds(on) * q g industry benchmark ? extremely low on-resistance r ds(on) ? high avalanche ruggedness ? low gate drive power losses applications ? switching applications description this device is an n-channel power mosfet developed using the 6 th generation of stripfet? deepgate? technology, with a new gate structure. the resulting power mosfet exhibits the lowest r ds(on) in all packages. to-220 1 2 3 tab $0y '7$% * 6 order code v ds r ds(on) max. i d STP105N3LL 30 v 3.5 m ? 150 a table 1. device summary order code marking packages packaging STP105N3LL 105n3ll to-220 tube www.st.com
contents STP105N3LL 2/13 docid023976 rev 2 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
docid023976 rev 2 3/13 STP105N3LL electrical ratings 13 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v ds drain-source voltage 30 v v gs gate-source voltage 20 v i d continuous drain current at t c = 25 c (silicon limited) 150 a i d continuous drain current at t c = 100 c (silicon limited) 105 a i d continuous drain current at t c = 25 c (package limited) 80 a i dm (1) 1. pulse width limited by safe operating area pulsed drain current 320 a p tot total dissipation at t c = 25 c 140 w derating factor 0.9 w/c e as (2) 2. starting t j = 25c, i av = 40 a single pulse avalanche energy 150 mj t stg storage temperature -55 to 175 c t j max. operating junction temperature 175 c table 3. thermal data symbol parameter value unit r thj-case thermal resistance junction-case max 1.1 c/w r thj-amb thermal resistance junction-ambient max 62.5 c/w
electrical characteristics STP105N3LL 4/13 docid023976 rev 2 2 electrical characteristics (t case = 25 c unless otherwise specified). table 4. static symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 30 v i dss zero gate voltage drain current (v gs = 0) v ds = 30 v 1 a v ds = 30 v, tc = 125 c 10 a i gss gate body leakage current (v ds = 0) v gs = 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a1 2.5v r ds(on) static drain-source on- resistance v gs = 10 v, i d = 40 a 2.7 3.5 m v gs = 4.5 v, i d = 40 a 3.5 4.5 m table 5. dynamic symbol parameter test conditions min typ. max. unit c iss input capacitance v ds = 25 v, f=1 mhz, v gs = 0 -3500-pf c oss output capacitance - 400 - pf c rss reverse transfer capacitance -380-pf q g total gate charge v dd = 15 v, i d = 80 a v gs = 4.5 v figure 14 -42-nc q gs gate-source charge - 9 - nc q gd gate-drain charge - 18 - nc r g gate input resistance f = 1 mhz, gate dc bias = 0, test signal level = 20 mv, i d = 0 -1- table 6. switching on/off (inductive load) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 15 v, i d = 40 a, r g = 4.7 , v gs = 5 v figure 13 -19 - ns t r rise time - 91 - ns t d(off) turn-off delay time - 24.5 - ns t f fall time - 23.4 - ns
docid023976 rev 2 5/13 STP105N3LL electrical characteristics 13 table 7. source drain diode symbol parameter test conditions min. typ. max. unit i sd source-drain current - 80 a i sdm (1) 1. pulse width limited by safe operating area source-drain current (pulsed) - 320 a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 40 a, v gs = 0 - 1.1 v t rr reverse recovery time i sd = 80 a, di/dt = 100 a/ s, v dd = 24 v figure 15 -28.6 ns q rr reverse recovery charge - 22.8 nc i rrm reverse recovery current - 1.6 a
electrical characteristics STP105N3LL 6/13 docid023976 rev 2 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. gate charge vs gate-source voltage figure 7. static drain-source on-resistance i d 10 1 0.1 0.1 1 v ds (v) 10 (a) operation in this area is limited by max r ds(on) 100s 10ms 1ms 0.01 tj=175c tc=25c single pulse 1s 100 am18155v1 single pulse =0.5 0.05 0.02 0.01 0.1 0.2 k 10 t p (s) -4 10 -3 10 -1 10 -5 10 -2 10 -2 10 -1 10 0 c am18156v1 i d 250 150 50 0 0 1 v ds (v) 2 (a) 3 1v v gs = 4, 5, 6, 7, 8, 9, 10v 100 200 4 2v 3v 300 am18157v1 i d 300 200 100 0 0 2 v gs (v) 4 (a) 1 3 50 150 250 v ds =1v am18158v1 v gs 6 4 2 0 0 40 q g (nc) (v) 8 60 80 10 v dd =15v i d =80a 20 am18159v1 r ds(on) 2.60 2.50 2.40 0 40 i d (a) (m ) 20 60 2.70 v gs =10v 80 2.80 2.90 am18160v1
docid023976 rev 2 7/13 STP105N3LL electrical characteristics 13 figure 8. capacitance variations figure 9. normalized gate threshold voltage vs temperature figure 10. normalized on-resistance vs temperature figure 11. normalized v (br)dss vs temperature figure 12. source-drain diode forward characteristics c 3000 2000 1000 0 0 20 v ds (v) (pf) 10 ciss coss crss 4000 5000 am18161v1 v gs(th) 0.6 0.4 0.2 0 -55 -5 t j (c) (norm) 0.8 45 95 i d =250a 120 1 1.2 am18162v1 r ds(on) 2 1 0 t j (c) (norm) 0.5 1.5 i d =40a v gs =10v -55 -5 45 95 120 am18163v1 v (br)dss -55 -5 t j (c) (norm) 45 95 0.92 0.94 0.96 0.98 1 1.02 1.04 1.06 i d =1ma 1.08 145 am18164v1 v sd 0 20 i sd (a) (v) 10 50 30 40 0.4 0.5 0.6 0.7 t j =-55c t j =175c t j =25c 0.8 0.9 60 70 1 am18165v1
test circuits STP105N3LL 8/13 docid023976 rev 2 3 test circuits figure 13. switching times test circuit for resistive load figure 14. gate charge test circuit figure 15. test circuit for inductive load switching and diode recovery times figure 16. unclamped inductive load test circuit figure 17. unclamped inductive waveform figure 18. switching time waveform am01468v1 v gs p w v d r g r l d.u.t. 2200 f 3.3 f v dd am01469v1 v dd 47k 1k 47k 2.7k 1k 12v v i =20v=v gmax 2200 f p w i g =const 100 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 a a b b r g g fast diode d s l=100 h f 3.3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3.3 f v dd am01472v1 v (br)dss v dd v dd v d i dm i d am01473v1 v ds t on td on td off t off t f t r 90% 10% 10% 0 0 90% 90% 10% v gs
docid023976 rev 2 9/13 STP105N3LL package mechanical data 13 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data STP105N3LL 10/13 docid023976 rev 2 figure 19. to-220 type a drawing bw\sh$b5hyb7
docid023976 rev 2 11/13 STP105N3LL package mechanical data 13 table 8. to-220 type a mechanical data dim. mm min. typ. max. a4.40 4.60 b0.61 0.88 b1 1.14 1.70 c0.48 0.70 d 15.25 15.75 d1 1.27 e 10 10.40 e2.40 2.70 e1 4.95 5.15 f1.23 1.32 h1 6.20 6.60 j1 2.40 2.72 l13 14 l1 3.50 3.93 l20 16.40 l30 28.90 ? p3.75 3.85 q2.65 2.95
revision history STP105N3LL 12/13 docid023976 rev 2 5 revision history table 9. document revision history date revision changes 13-dec-2012 1 first release. 03-apr-2014 2 ? added: section 2.1: electrical characteristics (curves) ? minor text changes
docid023976 rev 2 13/13 STP105N3LL 13 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2014 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com

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